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    <title>DSpace Collection: FCS</title>
    <link>http://localhost:8080/xmlui/handle/123456789/115</link>
    <description>FCS</description>
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        <rdf:li rdf:resource="http://localhost:8080/xmlui/handle/123456789/119" />
        <rdf:li rdf:resource="http://localhost:8080/xmlui/handle/123456789/118" />
        <rdf:li rdf:resource="http://localhost:8080/xmlui/handle/123456789/117" />
        <rdf:li rdf:resource="http://localhost:8080/xmlui/handle/123456789/116" />
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    <dc:date>2026-07-10T05:25:50Z</dc:date>
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  <item rdf:about="http://localhost:8080/xmlui/handle/123456789/119">
    <title>A Comparative Analysis Of Dark Channel Prior  Techniques Using Single Image Dehazing</title>
    <link>http://localhost:8080/xmlui/handle/123456789/119</link>
    <description>Title: A Comparative Analysis Of Dark Channel Prior  Techniques Using Single Image Dehazing
Authors: Pushpa, Koranga; Sumitra, Singar; Sandeep, Gupta
Abstract: Image has played important role in various fields such as surveillance, navigation, weather forecasting, computer  vision task, marine and so on. The scattering effect in the environment results in color fading and contrast reduction. As a result, clarity of image is seriously degraded resulting in decreased in performance of the multimedia processing system. In this paper various challenges and issues related to restoration of hazy image are  discussed in brief. Different types of dark channel prior techniques are also discussed.
Description: A Comparative Analysis Of Dark Channel Prior Techniques Using Single Image Dehazing</description>
    <dc:date>2022-01-01T00:00:00Z</dc:date>
  </item>
  <item rdf:about="http://localhost:8080/xmlui/handle/123456789/118">
    <title>Literature Survey: Single Image Dehazing Using Deep Learning  Techniques</title>
    <link>http://localhost:8080/xmlui/handle/123456789/118</link>
    <description>Title: Literature Survey: Single Image Dehazing Using Deep Learning  Techniques
Authors: Koranga, Pushpa; Singar, Sumitra; Sandeep, Gupta
Abstract: Bad weather conditions, such as fog and haze, can significantly degrade the quality of a scene&#xD;
captured by a camera. Practically, this is due to the substantial presence of particles in the &#xD;
environment that absorb and scatter light. In computer vision, the absorption and scattering &#xD;
processes are commonly modeled by a linear combination of the direct attenuation and the &#xD;
airlight. To overcome such problem image dehazing techniques was adopted. In classic &#xD;
techniques dehazing was done by using some prior knowledge, but this technique gives color &#xD;
distortion, artifact effect etc in the output scene. In this paper we have discussed different types &#xD;
of Convolutional Neural Network techniques (CNN) which are based on training of dataset and &#xD;
overcome the problem of classic techniques.
Description: Literature Survey: Single Image Dehazing Using Deep Learning Techniques</description>
    <dc:date>2022-01-01T00:00:00Z</dc:date>
  </item>
  <item rdf:about="http://localhost:8080/xmlui/handle/123456789/117">
    <title>Power Analysis of Novel Glitch Resistant DET-FF</title>
    <link>http://localhost:8080/xmlui/handle/123456789/117</link>
    <description>Title: Power Analysis of Novel Glitch Resistant DET-FF
Authors: Singar, Dr. Sumitra; Joshi, Prof. N.K.; Ghosh, Prof. P. K.
Abstract: In this digital era, the flip flops are widely used for data storage. To increase the flip flops reliability, speed and power  consumption, the fault resistant capacity must be improved. Therefore, it is needed to design the flip-flops for lowest average power consumption, smallest delay and area and maximum reliability with fault resistant capacity. Presently, the device scaling reduces the supply voltage requirement, transistor size, device capacitances, node charge and increases clock frequency therefore the circuits become vulnerable to the glitches. Voltage transient as a result of the collected charge is called a transient fault. In memory elements transient faults may be produced by the preceding combinational circuit glitches. Voltage supply scaling is a very efficient step to lower the power consumption. In static CMOS circuit designs, power consumption due to the glitches cannot be ignored as the portion of power consumption varies from 9% to 38% [1].&#xD;
In the field of digital integrated circuits and systems, the energy-efficient circuit design is one of the great challenge for the researchers [2]. In [3-7] the authors presented novel designs which are reduced great power consumption and provide the fault  free output with higher performance results. Clock network consumes more power, therefore, this is necessary to reduce the clock count. To reduce the clock count, the true single phase clock (TSPC) technique has been advised with the basic registers [8]. In [9], the authors proposed DET-FF to overcome the built-in clock overlap threat, by using true single phase clock circuits instead of an inverted clock. Power consumption in clock distribution network is very significant, which may account 45% of the total system power [10]. To reduce the clock power consumption, the clock frequency can be scaled down, by sampling the data on both of the falling  and rising edges of the clock, without altering the system throughput. The DET procedure reduce the 50% power dissipation of the clock network system. Although DET designs are more complex as compared to single edge triggered (SET) designs, this can be more energy efficient [11]. The dual data rate flip flop (DDR-FF) has a lower clock load by cause of its simple configuration and lower activity factor because of its hard edge quality factor [12]. DET flip flops provide the equal data rate as  SET flip-flops at the half of the clock frequency, which leading reduction in power dissipation of digital synchronous logic  designs [13-14]. Therefore, we have presented a novel low power glitch resistant DET-FF which can work accurately at low  voltage supply.  The rest part of this paper is organized as follows. Section II includes, background study. We have discussed the proposed design in section III. Section IV explains the comparative analysis of different DET-FF designs and finally section V, concludes this work
Description: Power Analysis of Novel Glitch Resistant DET-FF</description>
    <dc:date>2019-01-01T00:00:00Z</dc:date>
  </item>
  <item rdf:about="http://localhost:8080/xmlui/handle/123456789/116">
    <title>CO2 gas sensing properties of Na3BiO4‑Bi2O3 mixed oxide  nanostructures</title>
    <link>http://localhost:8080/xmlui/handle/123456789/116</link>
    <description>Title: CO2 gas sensing properties of Na3BiO4‑Bi2O3 mixed oxide  nanostructures
Authors: Gupta, Sandeep; Divakaran, Anoop Mampazhasseri; Awasthi, Kamlendra
Abstract: In this paper, we report Na3BiO4-Bi2O3 mixed oxide nanoplates for carbon dioxide gas sensing applications. These  nanoplates have been synthesized using electrochemical deposition with potentiostatic mode on ITO substrate and  characterized using scanning electron microscopy (SEM) and X-ray difraction (XRD) to analyze their surface morphology  and structure. SEM study shows the presence of horizontally aligned nanoplates stacked on top of one another (thickness ≈ 40 to 75 nm). XRD pattern shows the presence of monoclinic Na3BiO4 and Bi2O3. The gas percentage response is evaluated by measuring the change in electrical resistance of the nanoplates in the presence of carbon dioxide for diferent pressures at 50 °C, 75 °C, and 100 °C. Percentage response of more than 100% is seen at 30 psi gas pressure which increases to ≈277% at 90 psi at 100◦C.
Description: CO2 gas sensing properties of Na3BiO4‑Bi2O3 mixed oxide &#xD;
nanostructures</description>
    <dc:date>2022-01-01T00:00:00Z</dc:date>
  </item>
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